1. Field of the Invention
The present invention relates to a signal analyzing method, and more particularly, to a signal analyzing method for an electronic device having an on-chip network and an off-chip network.
2. Description of the Prior Art
Please refer to FIG. 1 and FIG. 2. FIG. 1 shows a simplified diagram of a conventional electronic device 100 having an on-chip network 110 and an off-chip network 120. FIG. 2 shows a flowchart of a conventional signal analyzing method for the electronic device 100. As shown in FIG. 1 and FIG. 2, the conventional signal analyzing method comprises the following steps:
Step 200: Define a number X of first power nodes P11˜P1x and a number Y of first ground nodes G11˜G1y in the on-chip network 110.
Step 210: Define a number X of second power nodes P21˜P2x and a number Y of second ground nodes G21˜G2y in the off-chip network 120.
Step 220: Utilize a quasi-static electromagnetic simulation to analyze the off-chip network 120.
However, this conventional signal analyzing method is not able to provide accurate electrical characteristics between two different interfaces, because when the method analyzes signals at high frequency, the phases of the signals are not accurate. Please refer to FIG. 3 and FIG. 4. FIG. 3 shows a simplified diagram of a conventional electronic device 300 having an on-chip network 310 and an off-chip network 320. FIG. 4 shows a flowchart of a conventional signal analyzing method for the electronic device 300. As shown in FIG. 3 and FIG. 4, the conventional signal analyzing method comprises the following steps:
Step 400: Define a number X of first power nodes P11˜P1x and a number Y of first ground nodes G11˜G1y in the on-chip network 310.
Step 410: Utilize a full wave electromagnetic simulation to analyze the off-chip network 320, thereby obtaining a number X of first resultant nodes P21˜P2x in the off-chip network 320.
However, this conventional signal analyzing method is not able to provide a complete electrical connection between two different interfaces.